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| www.irf.com page 1 data sheet no. pd60293 irs254(0,1)(s)pbf led buck regulator control ic description the irs254(0,1) are high voltage, high frequency buck control ics for constant led current regulation. they incorporate a continuous mode time-delayed hysteretic buck regulator to directly control the average load current, using an accurate on-chip bandgap voltage reference. the application is inherently protected against short circuit conditions, with the ability to easily add open- circuit protection. an external high-side bootstrap circuit drives the buck switching element at high frequencies. a low-side driver is also provided for synchronous rectifier designs. all functions are realized within a simple 8 pin dip or soic package. typical application diagram features ? 200 v (IRS2540) and 600 v (irs2541) half bridge driver ? micropower startup (<500 a) ? 2% voltage reference ? 140 ns deadtime ? 15.6 v zener clamp on v cc ? frequency up to 500 khz ? auto restart, non-latched shutdown ? pwm dimmable ? small 8-lead dip/8-lead soic packages packages 8-lead pdip 8-leadsoic irs254(0,1)pbf irs254(0,1)spbf 1 2 3 4 8 7 6 5 irs254(0,1) vcc ifb lo vs ho vb com m1 m2 cboot dboot rcs rf cf rs1 cvcc1 cvcc2 rov1 rov2 cen dov den1 l1 en com vbus cout rg1 rg2 vout + vout - ic1 cbus2 rs2 dclamp cbus1 l2 enn rout 4 .com datasheet u
irs254(0,1)(s)pbf www.irf.com page 2 alternate applicat ion circuit using a single mosfet irs254(0,1) 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 3 absolute maximum ratings absolute maximum ratings indicate sustained limits bey ond which damage to the device may occur. all voltage parameters are absolute voltages referenc ed to com, all currents are defined pos itive into any lead. the thermal resistance and power dissipation ratings are m easured under board mounted and still air conditions. symbol definition min. max. units IRS2540 -0.3 225 v b high-side floating supply voltage irs2541 -0.3 625 v s high-side floating supply offset voltage v b ? 25 v b + 0.3 v ho high-side floating output voltage v s ? 0.3 v b + 0.3 v lo low-side output voltage -0.3 v cc + 0.3 v ifb feedback voltage -0.3 v cc + 0.3 v enn enable voltage -0.3 v cc + 0.3 v i cc supply current (note 1) -20 20 ma dv/dt allowable offset voltage slew rate -50 50 v/ns (8-pin dip) --- 1 p d package power dissipation @ t a +25 oc p d = (t jmax -t a )/r thja (8-pin soic) --- 0.625 w (8-pin dip) --- 125 r thja thermal resistance, junction to ambient (8-pin soic) --- 200 oc/w t j junction temperature -55 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) --- 300 oc note 1: this ic contains a zener clamp structure between the chip v cc and com, with a nominal breakdown voltage of 15.6 v. please note that this supply pin should not be driven by a low im pedance dc power source greater than v clamp specified in the electrical characteristics section. recommended operating conditions for proper operation the device shoul d be used within recommended conditions. symbol definition min. max. units v bs high side floating supply voltage v cc ? 0.7 v clamp IRS2540 -1 200 v s steady state high-side floating supply offset voltage irs2541 -1 600 v cc supply voltage v ccuv+ v clamp v i cc supply current note 2 10 ma t j junction temperature -25 125 oc note 2: sufficient current should be supplied to v cc to keep the internal 15.6 v zener regulating at v clamp . 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 4 electrical characteristics v cc = v bs = v bias = 14 v +/- 0.25 v, c lo =c ho =1000 pf, c vcc =c vbs =0.1 f, t a =25 c unless otherwise specified. symbol definition min typ max units test conditions supply characteristics v ccuv+ v cc supply undervoltage positive going threshold 8.0 9.0 10.0 v cc rising from 0 v v ccuv- v cc supply undervoltage negative going threshold 6.5 7.5 8.5 v cc falling from 14 v v uvhys v cc supply undervoltage lockout hysteresis 1.0 1.2 2.0 v i qccuv uvlo mode quiescent current --- 50 150 a v cc =6 v i qccenn diesabled mode quiescent current --- 1.0 2.0 en>v enth+ i qcc quiescent v cc supply current --- 1.0 2.0 i fb = 1 v i cc50k v cc supply current, f = 50 khz --- 2.0 3.0 ma duty cycle = 50% f = 50 khz v clamp v cc zener clamp voltage 14.6 15.6 16.6 v i cc = 10 ma floating supply characteristics i qbs0 quiescent v bs supply current --- 1.0 2.0 v ho = v s i qbs1 quiescent v bs supply current --- 2.0 3.0 ma i fb = 0 v v bsuv+ v bs supply undervoltage positive going threshold 6.5 7.5 8.5 v bsuv- v bs supply undervoltage negative going threshold 6.0 7.0 8.0 v i lk offset supply leakage current --- 1 50 a IRS2540:v b =v s =200 v irs2541:v b =v s =600 v current control operation v ennth+ enn pin positive threshold 2.5 2.7 3.0 v ennth- enn pin negative threshold 1.7 2.0 2.3 v v 0.5 0.5 v voltage reference (die level test) 490 500 510 v ifbth ifb pin threshold 455 500 540 mv f maximum frequency --- 500 --- khz gate driver output characteristics v ol low level output voltage (ho or lo) --- com --- v hl high level output voltage (ho or lo) --- v cc --- v t r turn-on rise time --- 50 120 t f turn-off fall time --- 30 50 ns i o+/- output source/sink shor t circuit pulsed current --- 0.5/0.7 --- a dt deadtime --- 140 --- t lo,on delay between v ifb >v ifbth and lo turn-on --- 320 --- t lo,off delay between v ifb irs254(0,1)(s)pbf www.irf.com page 5 electrical characteristics v cc = v bs = v bias = 14 v +/- 0.25 v, c lo =c ho =1000 pf, c vcc =c vbs =0.1 f, t a =25 c unless otherwise specified. symbol definition min typ max units test conditions functional block diagram values in block diagram are typical values lead assignment pin assignments pin # symbol description 1 2 3 4 irs254(0,1) vcc com enn lo vs ho vb 8 7 6 5 ifb 1 3 7 6 5 4 2 ifb vcc ho vs lo current feedback high-side floating return high-side gate driver output 8 com vb high-side gate driver floating supply ic power & signal ground supply voltage enn disable outputs (lo=high, ho=low) low -side gate driver output watchdog timer t wd watchdog timer period --- 20 --- p wwd lo pulse width --- 1.0 --- s i fb =1 v level shift pulse filter & latch 7 8 6 vs ho vb 1 5 2 com lo vcc 15.6 v 4 enn 2 v 3 ifb delay delay uvlo uvn 0. 5 v watchdog timer 20 s 1 s pulse generator bandgap reference 100 k 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 6 state diagram 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 7 functional description operating mode the irs254(0,1) operates as a time-delayed hysteritic buck controlle r. during normal operating conditions the output current is regulated via the ifb pin voltage (nominal value of 500 mv). this feedback is compared to an internal high precision bandgap voltage reference. an on-board dv/dt filter has also been used to ignore erroneous transitioning. once the supply to the ic reaches v ccuv+ , the lo output is held high and the ho output low for a predetermined period of time. this initiates charging of the bootstrap capacitor, establishing the v bs floating supply for the high-side output. the ic then begins toggling ho and lo outputs as needed to regulate the current. fig.1 irs254(0,1) control signals, iavg=1.2 a as long as v ifb is below v ifbth , ho is on, modulated by the watchdog timer described below, the load is receiving current from v bus , which simultaneously stores energy in the inductor, as v ifb increases, unless the load is open. once v ifb crosses v ifbth , the control loop switches ho off after the delay t ho,off . once ho is off, lo will turn on after the deadtime (dt), the inductor releases the stored energy into the load and v ifb starts decreasing. when v ifb crosses v ifbth again, the control loop switches ho on after the delay t ho,on and lo off after the delay t ho,on + dt. the switching continues to regulate the current at an average value determined as follows. when the inductance value is large enough to maintain a low ripple on i fb , i out,avg can be calculated: rcs vifbth avg iout = ) ( (a) (b) f ig.2 (a) storing energy in inductor (b) releasing inductor stored energy t_lo_on t_ho_off dt1 ifbth 50% 50% 50% 50% t_lo_off dt2 t_ho_on ho lo ifb 50% fig.3 irs254(0,1) time delayed hysterisis the control method is based upon a free running frequency, in constrast to a more widely used fixed frequency regulation. this reduces the part count since there is no need for frequency setting components and also provi des an inherently stable sytem, which acts as a current source. a deadtime of approximately 140 ns between the two gate drive signals is necessary to prevent a ?shoot-through? condition. at higher frequencies, the switching losses become very large in the absence of this deadtime. the deadtime has been adjusted to maintain precise current regulation, while still preventing shoot-through. ho lo iout 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 8 watchdog timer during an open circuit condition, without the watchdog timer, the ho output would remain high at all times and the charge stored in the bootstrap capacitor c boot would gradually discharge the floating power supply for the high-side driver, which would then be unable to fully switch on the upper mosfet causing high losses. to maintain sufficient charge on the bootstrap capacitor, a watchdog timer has been implemented. in the condition where v ifb remains below v ifbth , the ho output will be forced low after 20 s and the lo output forced high. this toggling of the outputs will last for approximately 1 s to maintain and replenish sufficient charge on c boot . fig.4 illustration of watchdog timer bootstrap capacitor and diode the bootstrap capacitor value needs to be chosen so that it maintains sufficient charge for at least the approximately 20 s interval until the watchdog timer allows the capacitor to re charge. if the capacitor value is too small, the charge will dissipate in less than 20 s. the typical bootstrap capacitor is approximately 100 nf. the bootstrap diode should be a fast recovery or ultrafast recovery component to maintain good efficiency. since the ca thode of the bootstrap diode will be switching between zero and to the high voltage bus, the reverse recovery time of this diode is of critical importance. for additional information concerning the bootstrap components, refer to the design tip (dt 98-2), ?bootstrap component selection for control ics? at www.irf.com under design support disable (enn) pin the disable pin can be used for dimming and open- circuit protection. when t he enn pin is held low, the chip remains in a fully functional state with no alterations to the operating environment. to disable the control feedback and regulation, a voltage greater than v enth (approximately 2.5 v) needs to be applied to the enn pin. with the chip in a disabled state, ho output will remain low, whereas the lo output will remain high to prevent v s from floating, in addition to maintaining charge on the bootstrap capacitor. the threshold for disabling the irs254(0,1) has been set to 2.5 v to enhance immunity to any externally generated noise, or application ground noise. this 2.5 v threshold also makes it ideal to receive a drive signal from a local microcontroller. dimming mode to achieve dimming, a signal with constant frequency and set duty cycle can be fed into the enn pin. there is a direct linear relationship between the average load curr ent and duty cycle. if the ratio is 50%, 50% of the maximum set light output will be realized. likewise if the ratio is 30%, 70% of the maximum set light output will be realized. a sufficiently high frequency of the dimming signal must be chosen to avoid flashing or ?strobe light? effect. a signal on the order of a few khz should be sufficient. the minimum amount of dimming achievable (light output approaches 0%) will be determined by the ?on? time of the ho output, when in a fully functional regulating state. to maintain reliable dimming, it is recommended to keep the ?off? time of the enable signal at least 10 times that of the ho ?on? time. for example, if the application is running at 75 khz with an input voltage of 100 v and an output voltage of 20 v, the ho ?on? time will be 3.3 s (one-fourth of the period ? see calculations below) according to standard buck topology theory. this will set the minimum ?off? time of the enable signal to 33 s. s khz ho v v v v cycle duty on in out 3 . 3 75 1 * % 20 % 20 100 * 100 20 100 time = = = = ? = ho lo 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 9 enable duty cycle relationship to light output 0 10 20 30 40 50 60 70 80 90 100 0 102030405060708090100 percentage of light output enable pin duty cycle fig.5 light output vs enable pin duty cycle fig.6 irs254(0,1) dimming signals open circuit protection mode by using the suggested voltage divider, capacitor, and zener diode, the output voltage can be clamped at any desired value. in open-circuit condition without output clamp, the positive output terminal will float at the high-side input voltage. switching will still occur between the ho and lo outputs, whether due to the output voltage clamp or the watchdog timer. transients and switching will be observed at the positive output terminal as seen in fig. 8. the difference in signal shape, between the output voltage and the i fb , is due to the capacitor used to form the voltage clamp. t he repetition of the spikes can be reduced by simply increasing the capacitor size. the two resistors form a voltage divider for the output, which is then fed into the cathode of the zener diode. the diode will only conduct, flooding the enable pin, when its nominal voltage is exceeded. the chip will enter a disabled state once the divider network produces a voltage at least 2.5 v greater than the zener rating. the capacitor serves only to filter and slow the transients/switching at the positive output terminal. the clamped output voltage can be determined by the following analysis. the choice of capacitor is at the designer?s discretion. ( )( ) voltage rated nominal diode zener 5 . 2 2 2 1 = + + = dz r r r dz v v out fig.8 open circuit fault signals, with clamp under-voltage lock-out mode the under-voltage lock-out mode (uvlo) is defined as the state irs254(0,1) is in when v cc is below the turn-on threshold of the ic. during startup conditions, if the ic supply remains below v ccuv+ , the irs254(0,1) will enter the uv lo mode. this state is very similar to when the ic has been disabled via control signals, except that lo is also held low. when the supply is increased to v ccuv+ , the ic enters the normal operation mode. if already in normal fig.7 open circuit protection scheme 3 4 IRS2540/1 en ifb vout r1 r2 ho lo en 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 10 operation, the ic does not enter uvlo unless the supply voltage falls below v ccuv- - . inductance selection to maintain tight hysteret ic current regulation the inductor and output capacitor c out (in parallel with the leds) need to be large enough to maintain the supply to the load during t ho,on and avoid significant undershooting of the load current, which in turn causes the average current to fall below the desired value. first, we are going to look at the effect of the inductor when there is no output capacitor to clearly demonstrate the impact of the inductor. in this case, the load current is identical to the inductor current. fig. 9 shows how the inductor value impacts the frequency over a range of input voltages. as can be seen, the input voltage has a great impact on the frequency and the inductor value has the greatest impact at reducing the frequency for smaller input voltages. 175 225 275 325 375 425 30 80 130 180 vin (v) frequency (khz) 470uh 680uh 1mh 1.5mh fig.9 frequency response for chosen inductances i out = 350 ma, v out = 16.8 v fig. 10 shows how the variation in load current increases over a span of input voltages, as the inductance is decreased. fig. 11 shows the variation of frequency over different output voltages and different inductance values. finally fig. 12 shows how the load current variation increases with lower inductance over a range of output voltages. the output capacitor can be used simultaneously to achieve the target frequency and current control accuracy. fig. 11 shows how the capacitance reduces the frequency over a range of input voltage. a small capacitance of 4.7 f has a large effect on reducing the frequency. fig. 12 shows how the current regulation is also improved with the output capacitance. there is a point at which continuing to add capacitance no longer has a significant effect on the operating frequency or current regulation, as can be seen in figs. 13 and 14. 330 340 350 360 370 380 390 400 30 80 130 180 vin (v) iout (ma) 470uh 680uh 1mh 1.5mh fig.10 current regulation for chosen inductances i out = 350 ma, v out = 16.8 v 200 220 240 260 280 300 320 340 360 380 400 13 18 23 28 33 vout (v) frequency (khz) 470uh 680uh 1mh 1.5mh fig.11 frequency response for chosen inductances i out = 350 ma, v in = 50 v 325 327 329 331 333 335 337 339 341 343 345 13 18 23 28 33 vout (v) iout (ma) 470uh 680uh 1mh 1.5mh fig.12 current regulation for chosen inductances i out = 350 ma, v in = 50 v 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 11 10 100 1000 30 50 70 90 110 130 150 170 vin (v) frequency (khz) 0uf 4.7uf 10uf 22uf 33uf 47uf fig. 13 i out = 350 ma, v out = 16.8 v, l = 470 h 0 50 100 150 200 250 300 350 400 0 1020304050 capacitance (uf) frequency (khz) 40v 100v 160v fig. 14 i out = 350 ma, v out = 16.8 v, l = 470 h the addition of the c out increases the amount of energy that can be stored in the output stage, which also means it can supply current for an increased period of time. therefore by slowing down the di/dt transients in the load, the frequency is effectively decreased. with the c out capacitor, the inductor current is no longer identical to that seen in the load. the inductor current will still have a perfectly triangular shape, where as the load will see the same basic trend in the current, but all sharp corners will be rounded with all peaks significantly reduced, as can be seen in fig. 15 v cc supply since the irs245(0,1) is rated for 200 v (or 600 v), v bus can reach values of this magnitude. if only a supply resistor to v bus is used, it will experience extremely high power losses. for higher voltage applications an alternate v cc supply scheme utilizing the micro-power start-up and a resistor feed-back from the output needs to be implemented, as seen in fig. 16. fig. 15 i out = 350 ma, v in = 100 v, v out = 16.85 v, l = 470 h, c out = 33 f the resistance between v bus and v cc supply should be large enough to minimize the current sourced directly from the input voltage line; value should be on the order of hundreds of k ? . through the supply resistor, a current will flow to charge the v cc capacitor. once the capacitor is charged up to the v ccuv+ threshold, the irs254(0,1) enters the micro start-up regime and begins to operate, activating the lo and ho outputs. after the first few cycles of switching, the resistor connected between the output and v cc will take over and source all necessary current for the ic. the resistor connecting the output to the supply should be carefully designed according to its power rating. ma i cc p rs ma p ma v v rs rated rs rs out 10 2 2 ) 10 ( 10 6 . 15 2 _ 2 2 2 = ? = fig. 16 alternate supply diagram 1 2 3 4 8 7 6 5 irs254 0, ( 1) vcc enn ifb lo vs ho vb com vbus com enn 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 12 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 13 8-lead soic tape & reel e f a c d g a b h n ote : controlling dimension in mm loaded tape feed direction a h f e g d b c carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial 4 .com datasheet u irs254(0,1)(s)pbf www.irf.com page 14 the soic-8 is msl2 qualified . this product has been designed and qualif ied for the industrial level. qualification standards can be found at www.irf.com |
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